Introduction

In this assignment I would try my level best to fulfill all the condition of the given tasks. I would concern figure of things while attempting the assignment. Firstly, the referencing and the bibliography should be updated timely because it will help me keep in mind where I have got the materials from. Secondly I would try to complete my assignment under the chosen time limit which is very vital. Thirdly all the given tasks should be completed with appropriate information and try to stay within the word count. Lastly, I would try to present my work with clarity and rationality so my hard work should be understood in best possible manner

TASK 1: THE 555 TIMER IC.

1a) Before 555 timer came to the market there were large distinct circuits used to carry out the operation of a timer but the compatibility and numerous other advantages of a 555 timer lead the breakthrough .The 555 timer is an integrated circuit designed by Hans R. Camenzind and commercialized by that times leading semiconductors manufacturer signetics. It’s mainly used in variety for timing purposes, producing perfect timing periods through a vast range of time and as a multi vibrator and due to the versatility of the IC it has made conspicuous place in the history of electronics. Never thought by its maker to be so flexible the 555 package consists of numerous transistors, diodes and resistors (depending on the purposes) imbedded on a silicon chip and connected to an 8-pin dual in line package.

(D C Green, Electronics 4, third edition, 1995, Longman Scientific and technical)

The single 555 timer chip in its basic form is a 8 pin chip consisting of 20 transistors, 2 diodes, 15 resistors.

(http://www.electronics-tutorials.ws/waveforms/555_timer.html )feb 10, 2011

Above shown fig shows 8 pins which are labeled to show there function. Below is the more detailed function of these pins.

Pin no. 1: It is connected to GROUND which connects the 555 timer to the negative 0v supply rail.

Pin no. 2: It is the trigger pin. A negative pulse on this pin “sets” internal flip-flop and start up a timing cycle.

Pin no. 3: is an output pin of the 555 timer, it can be connected directly to the inputs of other digital IC’S with the required voltage.

Pin no. 4: is the RESET pin which is used to reset the internal flip-flop controlling the output. In other words to terminate the timing cycle.

Pin no. 5: is a control voltage pin which can be used to alter the timing aspect of the 555 IC in applications such as frequency modulation.

Pin no. 6: is the threshold pin which donates the duration of the timer to ‘output voltage in each of the on/off cycle’ this time phase end when voltage at threshold becomes higher than control voltage pin.

Pin no. 7: is a discharge pin which is connected directly to the internal transistor which is used to discharge the timing capacitor to ground.

Pin no. 8: is connected to the power supply and the range of voltage depends on the appliance need.

MODES:

After discussing above the different functions of 555 timers, let’s now discuss about its modes, its usage in different modes. 555 timers IC’s can be used as a multivibrator in three different forms they are as follow:

Astable mode Monostable mode Bistable mode

ASTABLE MODE:

Astable means without a stable state. It has two unstable state means 0 and 1, in other words it continually switch it states to high and low creating a rectangular wave form on its output. There are numerous advantages of this circuit few of them in which it is used are flash lights, LED’S, and security alarm.

FIG 2

(http://www.kpsec.freeuk.com/images/flashlcd.gif FEB 10, 2011)

FIG 3

(http://www.antonineeducation.co.uk/Electronics_AS/Electronics_Module_1/topic_11/topic_11__555_timer_circuit.htm FEB 10, 2011)

For the waveform above we can see how it changed from 0 to 1. For this circuit to become operational we need to consider some of the formulas

‘’The mark time [t(H] is the time at which the output is a 1. t(H)= 0.7(RA + RB)C The space time [t (L)] is the time at which the output is a 0. t(L) = 0.7 RBC The mark to space ratio = mark time ? space time. The astable period T is the time taken for one complete cycle, the mark and the space times added together. T = mark + space = t(L) + t(H). The frequency = 1 ? period.

f = ____1.4_____

(R1 + 2R2)C

The time t (H) will be longer than t (L), unless R1 is very small compared to R2. If this is the case, then t (H) will be approximately equal to t (L), but not quite equal. We can say to a first approximation that the mark to space ratio is 1. This will result in a square wave output’’

( http://www.antonine-education.co.uk/Electronics_AS/Electronics_Module_ 1/topic_11/topic_11__555_timer_circuit.htm FEB 10, 2011

MONOSTABLE MODE:

Monostable means circuit which has only one stable state, normally it has two states means stable and unstable. When the voltage is not applied it remains in stable state but as the “trigger” is pressed it creates electric pulse and switches from stable state to unstable state and remains there for a limited time period which is set and after that it comes back to stable state.

This type of circuit is ideal for “push to operate” system for a model displayed at exhibitions. A visitor push the button to start mechanism of choice and it automatically switch off after a set time.

FIG 4

(http://www.antonineeducation.co.uk/Electronics_AS/Electronics_Module_1/topic_11/topic_11__555_timer_circuit.htmFEB 11, 2011)

The above diagram shows the circuit of monostable 555 timer. This circuit operates when the switch is closed and released, the voltage at Pin 2 goes up to down and then up. Due to this Pin 7 is discharged from zero and the voltage increases at output. When the voltage across the capacitor (C) gets two third then the output stop and it comes to stable state. The output of this circuit is shown in the FIG below.

FIG 5

(http://www.antonineeducation.co.uk/Electronics_AS/Electronics_Module_1/topic_11/topic_11__555_timer_circuit.htm FEB 11, 2011)

BISTABLE MODE:

Bistable has two stable states, in this mode 555 timer acts as a flip-flop. In this the trigger (which is Pin 2) and reset (which is Pin 4) both are at high state because of the resistors, while the threshold (which is Pin 6) is simply grounded.

By taking the trigger LOW it switches to SET position and the output state changes to HIGH and by taking the RESET Pin LOW it switches to reset position and the output will remain LOW.

TASK 1(B):

A 555 timer is basically used in our daily life as a day/light alarm which can be useful for waking us up from our sleep.

Fig 6 http://www.free-circuits.com/diagrams/n/14qwe.gif (March 20, 2011)

The components which are used in the above diagram are as follows:

1 Light Dependant Resistor (LDR) 1 transistor 2 set of capacitors both value of 0.01 ?F 1 555 timer 1 diode 15v/1µF 3 set of resistor range of 10k, 56k and 3.3 k respectively 1 100k variable resistor 1 speaker 8ohm, 0.5W

OPERATION:

This above circuit exclusively depends on the light for it to function. A 555 timer is used above and it works on a principle of astable mode with frequency of 1Khz. The transistor is set high because of the changeable resistor when light doesn’t fall on the LDR therefore causing the 555’s reset pin low. Just because of this the timer is reset. It resistance decrease when the light falls on LDR which in turn causes a decrease in base resistance of the transistor alloying current to flow. This will cause the reset pin on the 555 timer to increase and allows the timer to ‘oscillate’ and the speaker starts working by creating sound.

TASK 2: INTRODUCTION OF FET TRANSISTOR:

The field effect transistor is a semiconductor device; it depends on its operation to control current by an electric field. FET’s are available in two basic forms and they are:

Junction gate field effect transistor (JFET) Insulated gate field effect transistor (IGFET)

But the most commonly used transistor is Metal-Oxide semiconductor field effect transistor (MOSFET). It is commonly used because it can be connected as resistor and capacitor, it is cheaper than Bipolar junction transistor (BJT) , it is much smaller in size and there power consumption is much smaller.

CONSTRUCTION AND OPERATION OF FET

Metal-Oxide semiconductor field effect transistor (MOSFET) is a type of semiconductor which uses three connections which are GATE, SOURCE and DRAIN.

The effective width of the channel is controlled by a charge which is placed on gate electrode. The shape of a transistor is like a bar with P-type silicon and two strips which are doped to make N-type material when the metal is deposited to make two terminals DRAIN and SOURCE, then the surface is covered with silicon-oxide which is non-conductor. Then again metal is deposited to form one more terminal called gate which is shown in fig 1.

http://www.interfacebus.com/JFET-N-Channel-symbol.png (March 20, 2011)

After it is completed then the potential of (0V) is applied between the source and drain because of P-N junction there is no current flowing. The P-type material which is source terminal is at 0V, and the gate is already made positive so that it will repel the holes from P-type and turn it temporary N-type. This creates a channel joining two N-type strip so that current flow from drain. If the potential against gain terminal is greater, than the channel will become wider which ends with large current. So to conduct this type, positive voltage is applied to gate.

http://www.circuitstoday.com/wp-content/uploads/2009/08/n-channel-de-mosfet-structure.jpg (March 20, 2011)

Metal oxide semiconductor field effect transistor (MOSFET) is operated in two modes they are:

Depletion mode Enhancement mode

DEPLETION MODE:

Regardless of weather a MOSFET is N-type or P-type material but there are still fundamental difference between depletion mode and enhancement mode. To form a thin layer of silicon-oxide along one side of the channel is easy, and then leave the metal gate region down over the insulator. The gate channel will act as a semiconductor resistance as there Is not current applied to it, P-N junction is not formed nor the depletion layer because the whole conduction of current depends upon the voltage applied between source and drain.

If we apply sufficient voltage across source and drain the current will flow through the channel. When negative voltage is applied through the gate terminal it will repel electron charge away from the gate terminal. But as N-type contain majority electron charge carriers by repelling then away from gate the applied negative voltage will create a depletion region. So the process is called Depletion Mode Metal-Oxide Semiconductor Field Effect Transistor.

THE ENHANCEMENT MODE MOSFET:

Enhancement mode contains two N-type channel and one P-type channel which is sandwiched between both N-type as shown in fig 2. Applying the positive voltage to the drain terminal with respect to source terminal and applying positive terminal to gate terminal. As a result it will attract all the free electrons towards the gate. As the positive voltage is increased the electric field will also become wider and more electrons are attracted. There are free electrons in P-type, source junction is forward biased, so the positive gate voltage can attract electrons towards the gate. The electrons which are attracted towards the gate will enhance the channel within the P-type region as shown in fig 3. This will bridge the gap between source and the drain and it will start

FIG 2 FIG 3

COMAPRISON BETWEEN MOSFET AND BJT:

Metal Oxide Semiconductor Transistor (MOSFET)

It is semiconductor device having three active electrodes known as Gate, Source and Drain. Conduction takes place due to either holes or electrons. Hence it is a unipolar Transistor. It is voltage controlled device. Its operation depends upon the flow of majority carriers only. It has high input impedance. It is less noisy than tube or bipolar transistor. There are two type of FETs N-channel P-channel. It is simpler to fabricate and occupies less space. It has thermal stability. It can be used as voltage variable resistor. It has very fast switching time.

Bipolar Junction Transistor (BJT)

It is a semiconductor device consisting of three electrodes known as Base, Emitter and Collector. Conduction takes place due to holes and electrons. Hence it is a bipolar device. BJT is a current controlled device. It operation depend upon the flow of both majority and minority carriers. BJT has low input impedance. BJT device is noisy. There are two type of BJTs NPN and PNP. BJT is difficult to construct and occupies more space. BJT does not have thermal stability. BJT cannot be used as voltage variable resistor.

ADVANTAGE OF MOSFET DEVICE:

When compared to MOSFET, its switching time is slow Its switching time is 10 times greater than a bipolar junction It has very much switching current. It is less affected by temperature.

DISADVANTAGE OF MOSFET DEVICE:

It has very high resistance as compared to bipolar transistor. It can be destroyed by high voltage, especially static electricity.

USES OF MOSFETs:

MOSFETs can also be used as voltage variable resistor. It is also used as an amplifier. It is also used to prevent power losses. It is used as a switch. It is used as a voltage control device. REFERENCES:

Books:

Owen Bishop (1995), Understand Electronics, Great Britain, Athenaeum Press Ltd.

(http://www.electronics-tutorials.ws/waveforms/555_timer.html )feb 10, 2011

(http://www.kpsec.freeuk.com/images/flashlcd.gif FEB 10, 2011)

(http://www.antonineeducation.co.uk/Electronics_AS/Electronics_Module_1/topic_11/topic_11__555_timer_circuit.htm FEB 10, 2011)

( http://www.antonine-education.co.uk/Electronics_AS/Electronics_Module_ 1/topic_11/topic_11__555_timer_circuit.htm FEB 10, 2011

(http://www.antonineeducation.co.uk/Electronics_AS/Electronics_Module_1/topic_11/topic_11__555_timer_circuit.htmFEB 11, 2011)

(http://www.antonineeducation.co.uk/Electronics_AS/Electronics_Module_1/topic_11/topic_11__555_timer_circuit.htm FEB 11, 2011)

http://www.free-circuits.com/diagrams/n/14qwe.gif (March 20, 2011)

http://www.interfacebus.com/JFET-N-Channel-symbol.png (March 20, 2011)

http://www.circuitstoday.com/wp-content/uploads/2009/08/n-channel-de-mosfet-structure.jpg (March 20, 2011)